A Fully Synthesizable Design Flow for High-Speed Dual-Phase Domino Logic
Abstract: Domino logic design offers smaller area and higher speed than complementary CMOS design. Domino logic design has become a very popular technology used to design high-performance processors. There have been several studies conducted on dual phase operation dynamic circuit, but most have focused on theory without practical imple- mentation in large circuits. In this thesis, we establish the cell based synthesis design flow of the high speed dual phase operation dynamic circuit, which includes skew tolerant, low-power and high-performance characteristics. There are three major contributions of this work. First, a high-performance dual phase circuit design technique is proposed. Second, a supported synthesizable design CAD flow is established. The skew-tolerant issue is also considered in the tools. A domino cell library with two noise-alleviation (charge sharing and crosstalk) capabilities is generated to support the cell-based synthesis CAD design tools. Third, the built-in performance adjusting mechanism is conducted within the design. This mechanism can support turning performance after chip fabrication. The test chip of dual-phase 32 × 32 high-speed multiplier with performance mechanism was successfully validated.
文章引用: 蔡佑慈 , 黄翔晖 , 郑经华 (2013) 高速双相动态电路暨设计自动化流程之实现。 电路与系统， 2， 23-29. doi: 10.12677/OJCS.2013.22005
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